1 Basic knowledge

Bandwidth	The amount of data transmitted per unit of time, typically bits per second (b/s) or bytes per second (B/s).
EOF	End-of-(micro)Frame
EOP	End-of-Packet
SOF	Start-of-(micro)Frame - The first transaction in each (micro)frame
SOP	Start-of-Packet
Pipe	A logical abstraction representing the association between an endpoint on a device and software on the host
Microframe	A 125 microsecond time base established on high-speed buses.
Phase	A token, data, or handshake packet. A transaction has three phases.

2 Architecture Overview

2.1 Electrical

There are three data rates:

• The USB high-speed signaling bit rate is 480 Mb/s.

• The USB full-speed signaling bit rate is 12 Mb/s.

• A limited capability low-speed signaling mode is also defined at 1.5 Mb/s.

• The clock is transmitted, encoded along with the differential data.

• The clock encoding scheme is NRZI with bit stuffing to ensure adequate transitions.

• In NRZI encoding, a “1” is represented by no change in level and a “0” is represented by a change in level.

• self-powered or bus-powered devices

2.2 Bus Protocol

• The USB is a polled bus. The Host Controller initiates all data transfers.
• The USB data transfer model between a source or destination on the host and an endpoint on a device is referred to as a pipe.
• One message pipe, the Default Control Pipe, always exists once a device is powered, in order to provide access to the device’s configuration, status, and control information.

2.3 Error Behavior

• The protocol includes separate CRCs for control and data fields of each packet.
• When data integrity is required, such as with lossless data devices, an error recovery procedure may be invoked in hardware or software.
• The protocol allows for error handling in hardware or software. Hardware error handling includes reporting and retry of failed transfers.

2.4 System Configuration

• USB data transfers take place between host software and a particular endpoint on a USB device.
• Such associations between the host software and a USB device endpoint are called pipes.
• The USB architecture comprehends four basic types of data transfers: Control Transfers, Bulk Transfers, Interrupt Transfers, Isochronous Transfers
  

3 USB Data Flow Model

• USB Physical Device: A piece of hardware on the end of a USB cable that performs some useful end user function.
• Client Software: Software that executes on the host, corresponding to a USB device. This client
  software is typically supplied with the operating system or provided along with the USB device.
• USB System Software: Software that supports the USB in a particular operating system. The USB
  System Software is typically supplied with the operating system, independently of particular USB
  devices or client software.
• USB Host Controller (Host Side Bus Interface): The hardware and software that allows USB devices to be attached to a host.

3.1 Device Endpoints

• Each USB logical device is composed of a collection of independent endpoints.
• All USB devices are required to implement a default control method that uses both the input and output endpoints with endpoint number zero.

3.2 Pipes

• A USB pipe is an association between an endpoint on a device and software on the host.
• Pipes represent the ability to move data between software on the host via a memory buffer and an endpoint on a device.
• There are two mutually exclusive pipe communication modes:
• • Stream: Data moving through a pipe has no USB-defined structure, Stream pipes support bulk, isochronous, and interrupt transfer types
• • Message: Data moving through a pipe has some USB-defined structure, Message pipes support the control transfer type
• The Default Control Pipe is used by the USB System Software to determine device identification and configuration requirements and to configure the device
• A software client normally requests data transfers via I/O Request Packets (IRPs) to a pipe and then either waits or is notified when they are completed.

3.3 Frames and Microframes

• USB establishes a 1 millisecond time base called a frame on a full-/low-speed bus and a 125 μs time base called a microframe on a high-speed bus.
• A (micro)frame can contain several transactions.

3.4 Control Transfers

• Used to configure a device at attach time and can be used for other device-specific purposes, including control of other pipes on the device.
• A control transfer is composed of a Setup bus transaction moving request information from host to function, zero or more Data transactions sending data in the direction indicated by the Setup transaction, and a Status transaction returning status information from function to host.
• The maximum control transfer data payload sizes for full-speed devices is
  8, 16, 32, or 64 bytes; for high-speed devices, it is 64 bytes and for low-speed devices, it is 8 bytes.
• A Setup packet is always 8 bytes.

3.5 Bulk Transfers

• Generated or consumed in relatively large and bursty quantities and have wide dynamic latitude in transmission constraints.Bulk data typically consists of larger amounts of data.
• The USB defines the allowable maximum bulk data payload sizes to be only 8, 16, 32, or 64 bytes for full-speed endpoints and 512 bytes for high-speed endpoints.

3.6 Interrupt Transfers

• Used for timely but reliable delivery of data, for example, characters or coordinates with human-perceptible echo or feedback response characteristics.
• Interrupt data typically consists of event notification, characters, or coordinates that are organized as one or more bytes.
• The maximum allowable interrupt data payload size is 64 bytes or less for full-speed. High-speed endpoints are allowed maximum data payload sizes up to 1024 bytes.

3.7 Isochronous Transfers

• Occupy a prenegotiated amount of USB bandwidth with a prenegotiated delivery latency. (Also called streaming real time transfers).
• Any error in electrical transmission is not corrected by hardware mechanisms such as retries.
• The USB limits the maximum data payload size to 1,023 bytes for each full-speed isochronous endpoint. High-speed endpoints are allowed up to 1024-byte data payloads.

3.8 Split Transactions

• Host controllers and hubs support one additional transaction type called split transactions.
• This transaction type allows full- and low-speed devices to be attached to hubs operating at high-speed.
• These transactions involve only host controllers and hubs and are not visible to devices.

3.9 Bus Access for Transfers

• Transfer Management: The entities and the objects that support communication flow over the USB
• Transaction Tracking: The USB mechanisms that are used to track transactions as they move through the USB system
• Bus Time: The time it takes to move a packet of information over the bus
• Device/Software Buffer Size: The space required to support a bus transaction
• Bus Bandwidth Reclamation: Conditions where bandwidth that was allocated to other transfers but was not used and can now be possibly reused by control and bulk transfers

3.10 Transaction Packet Sequences

• The packets that comprise a transaction varies depending on the endpoint type. There are four endpoint types: bulk, control, interrupt, and isochronous.

3.10.1 Bulk transaction

• Bulk transactions use a three-phase transaction consisting of token, data, and handshake packets.
  

3.10.2 Control transfer

• Control transfers minimally have three transaction stages: Setup , Data(optional), and Status.
• SETUP stage
• • During the Setup stage, a SETUP transaction is used to transmit information to the control endpoint of a function.
    
• Data and status stage
• • The Data stage, a control transfer consists of one or more IN or OUT transactions and follows the same protocol rules as bulk transfers.
• • The Status stage of a control transfer is the last transaction in the sequence. The status stage transactions follow the same protocol sequence as bulk transactions.
    

3.10.3 Interrupt Transactions

• Interrupt transactions may consist of IN or OUT transfers.
  

3.10.4 IsochronousTransactions

• Isochronous transactions have a token and data phase, but no handshake phase.